Halbleiter Design Ingenieur (m/w/d) Teamleiter

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Note: Please apply exclusively via our direct application link hosted by Empfehlungsbund and ITsax.de: https://en.itsax.de/jobs/236431/semiconductor-design-engineer-m-slash-w-slash-d-team-manager-in-dresden. We are looking forward to meet you!

Verification Technology Inc. is a leading international design and verification services company based in Japan. Our service for semiconductor design helps to realize reliable and robust products.

Our comprehensive service expertise covers a wide range of electronic design disciplines f.e.:

• RISC-V core verification
• functional safety design service including consulting services compliant with ISO26262 and IEC61508

In order to maintain the continuous growth of our company, we are looking for:

Semiconductor Design Engineer (m/w/d) Team Manager

for our new location in Dresden.

Your challenge:

As a core member and manager of your future team of engineers, you will join our unique business model with a motivated, friendly and multicultural team. You enjoy working with experienced Japanese engineers, learning from them as well as being involved in the hiring and training of more German engineers? You also like to join sales activities and support our sales team in order to expand our business on the German market?

Your profile:

• You more than 10 years practical experience in the area of digital circuit design in semiconductor LSIs.
• Fluent English and German communication skills
• You are a self-motivated, goal-oriented person who wants to achieve excellent work results.
• You are comfortable or even prefer working across technical?
• You have experience or interest in personnel management and would like to lead your own team of up to 5 (five) engineers.
• You are excited about working closely with customers to develop new products that will change the world for the better.
• You communicate clearly and effectively with technical and non-technical subjects in English.
• You enjoy working with our friendly and multicultural team.

Mandatory experiences or knowledge:

• Large scale RTL design over 100K gate in Verilog HDL and VHDL, including architecture investigation, logic design, logic verification, timing optimization for the critical path.
• Experience of refining the required specifications
• Experience in managing projects with at least three members.
• Investigating the verification strategy appropriate for the target
• Extract the test points from the specification
• Creating the test bench and verification of the test bench

The following experience or knowledge is a plus:

• Functional safety
• SystemVerilog or UVM
• Formal verification
• Standard interfaces (eg. AMBA AXI, PCI Express, MIPI, USB, DDR-SDRAM)
• Experience of FPGA implementation
• Knowledge of the semiconductor or electronics industry area and its applications (AI, automotive, medical, storage, etc.)

Working conditions:

• Office in Dresden: Verification Technology Germany GmbH, Bamberger Str.7, 01187 Dresden

• Working time from 8:00am – 5:00pm
• For irregular meetings with the head office in Japan, some early mornings around 7am starting time are required.

We offer great career opportunities, an attractive salary as well as an excellent working environment. Are you interested?